SUMMARY

Fluid and thermal transport processes occur across multiple length scales in thermal management of electronic systems, ranging from nanometers to tens of meters. The number of degrees of freedoms (DOF) of such systems is too large to be solved by existing computational techniques and hardware. The general objective of this research is to develop an experimentally validated thermal characterization framework from the chip to the cabinet levels, with possible extension to larger and smaller length scales, under both steady-state and transient scenarios. To this end, a systematic multi-scale, multi-mode heat transfer and fluid flow steady-state modeling methodology based on the Proper Orthogonal Decomposition (POD) is developed for microsystems. Compact characterization of components such as thermoelectric cooling (TEC) modules and plastic quad flat packages (PQFP) are also developed, and are incorporated into system level models. With a sequential two-step zoom-in approach, detailed package level characterizations are realized via extracting thermal information from global modeling. Reduced order modeling (ROM) for transients is also investigated. The component-level dynamical ROM will be developed and a handshaking scheme to capture the interactions of ROMs at the system level simulation will be investigated. Component- and system-level error analyses will be addressed, along with a general framework for the optimization of system observations for the POD reduced order modeling under both steady-state and transient scenarios. Chip junction temperatures predicted by POD steady-state reduced order modeling is above 90% of the measurements conducted on a simulated server cabinet. A hybrid forced air convection, thermoelectric cooling, and microchannel liquid cooling based cabinet is developed for the validation of the methodology.