SUBJECT: Ph.D. Proposal Presentation
BY: Sungbum Kang
TIME: Friday, May 2, 2014, 10:00 a.m.
PLACE: MARC Building, 401
TITLE: Development of Dynamic Digital Fringe Projection Technique for Measuring Warpage of Unpainted Chip Packages and Boards and Parametric Studies of Causes of PBGA Warpage
COMMITTEE: Dr. I. Charles Ume, Chair (ME)
Dr. Suresh K. Sitaraman (ME)
Dr. Thomas E Michaels (ECE)
Dr. Jianjun Shi (ISYE)
Dr. Michael Mello (AE)


The new generation of chip packages is becoming smaller and more complex, and at the same time requiring superior quality and reliability. With this new trend, the crucial reliability factor, such as warpage, which accompanies new chip package design, has to be assessed, predicted, and contained. Among the various warpage measurement techniques, fringe projection techniques (laser fringe projection (LFP) and digital fringe projection (DFP)) are recent trends because of their noncontact, full-field, and high-resolution measurement capabilities for measuring the warpage of chip packages and boards (i.e., PWB and PWB assemblies). When using the fringe projection techniques, reflective painting is generally sprayed on the sample surface to make the surface reflectance uniform and to obtain better image contrast for the measurement process. However, because painted samples may no longer be re-used, and the spray-painting process is not suitable inline, new technique for measuring the warpage without painting is required. Along with the warpage measurement; accurate warpage prediction for a particular chip package is also required for the package design processes. The objectives of this proposed research are: 1) to compare the key advantages and disadvantages of the various warpage measurement techniques to provide guidelines for manufacturing engineers to select the most suitable warpage measurement technique for a particular application, 2) to develop a DFP system for measuring warpage of painted chip packages and boards and experimentally compare it with the previously developed LFP system, 3) to develop a novel technique, dynamic digital fringe projection (DDFP), for measuring warpage of unpainted chip packages and boards, 4) to assess the effects of solder bump pitch, package size, and molding compound and substrate thicknesses on warpage of plastic ball grid array (PBGA) packages by using parametric finite element studies to provide design guidelines for in-house PBGA designers. The proposed research is expected to improve the yields and reliability of chip packages. This will reduce the manufacturing costs and time to market chip packages, and subsequently reduce the prices of the end-products.