SUMMARY

With continued push toward 3D integrated systems, through-silicon vias (TSVs) play an important role in interconnecting stacked dies. When the continued reduction in TSV diameter, the grain size and orientation of electroplated copper in TSVs are significantly influenced by the surrounding silicon. When such TSVs are annealed at high temperatures, the microstructure further changes, and the properties of the electroplated copper material also changes.
Starting with electroplated copper in silicon trenches, this work has employed nano-indentation technique to determine the elastic modulus, hardness, and the elastic-plastic behavior of copper. Upon annealing the electroplated copper over a number of temperature regimes, this work has examined changes in the material properties of copper. In addition, the samples have been placed in a scanning electron microscope (SEM) equipped with electron backscattering diffraction (EBSD) to study the grain size and grain orientation before and after thermal annealing. Different temperature conditions and durations have been used to anneal the electroplated copper constrained in silicon trenches. Based on this work, clear correlations between annealing profile and copper microstructure in fine silicon trenches are obtained. Using the experimental data, numerical models are built to account for different grain orientations, and thus, the overall stress and strain distribution of copper in silicon trenches. The results from such models are compared against isotropic models commonly used in literature.