|SUBJECT:||M.S. Thesis Presentation|
|TIME:||Thursday, March 27, 2014, 2:00 p.m.|
|PLACE:||MARC Building, 401|
|TITLE:||Experimental and Theoretical Assessment of Thin Glass Panels as Interposers for Microelectronic Packages|
|COMMITTEE:||Dr. Suresh K. Sitaraman, Chair (ME)
Dr. Rao R. Tummala (ECE&MSE)
Dr. Yogendra Joshi (ME)
As the microelectronic industry moves toward stacking of dies to achieve greater performance and smaller footprint, there are several reliability concerns when assembling the stacked dies on current organic substrates. These concerns include excessive warpage, interconnect cracking, die cracking, and others. This work examines the use of diced glass panel as an interposer, as glass provides intermediate coefficient of thermal expansion between silicon and organics, good mechanical rigidity, large-area panel processing for low cost, planarity, and better electrical properties. However, glass is brittle and low in thermal conductivity, and there is very little work in existing literature to examine glass as a potential interposer material.